|장소||E6-2 #1323 (1st floor)|
|일시||Sep. 29th(Thu), 4PM|
|연사||Dr. Sangyoon Han, Department of Physics, KAIST|
Large-scale Silicon Photonic MEMS Switches
Sep. 29th(Thu), 4PM, E6-2 #1323 (1st floor)
Dr. Sangyoon Han, Department of Physics, KAIST
Fast optical-circuit-switches (OCS) having a large number of ports can significantly enhance the performance and the efficiency of modern data centers by actively rearranging network patterns. Commercially available optical switches operating with the use of moving mirror arrays have port counts exceeding 100x100 and insertion losses fewer than a few dBs. However, their switching speeds are typically tens-of-milliseconds which limits their applications in highly dynamic traffic patterns.
Recently, optical switches based on silicon photonics technology have been designed and built. Silicon photonic switches with microsecond or nanosecond response times have been demonstrated, and silicon photonic switches with integrated CMOS driving circuits have been demonstrated. However, the demonstrations were mostly limited to a small number of ports due to their cascaded 2x2 architecture which induces high optical losses as port-count increases. Moreover, the demonstrations were limited to single polarization operations, and narrow spectral bandwidths.
In this talk, I will introduce a new architecture for silicon photonic switches that is highly scalable (optical insertion loss < 1 dB regardless of port-count), polarization-insensitive (< 1dB of PDL), and ultra-broadband (~300nm). The new architecture uses a two-level waveguide-crossbar with moving waveguide couplers that configure light paths. Three experimental implementations of the new architecture with 50x50 ports will be shown in the talk.
Sangyoon Han is a postdoctoral research associate in the Physics department at KAIST. He received his Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley in 2016. He received his B.S. in Electrical Engineering from Seoul National University. He was a recipient of Korea Foundation for Advanced Studies Scholarship for study abroad, and he was a recipient of a graduate bronze medal from Collegiate Inventors Competition (USPTO sponsored) in 2015.
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|128||May. 8th (Wed), 16:00||E6 Room(#1323)||Jieun Lee||Imaging valley dependent electron transport in 2D semiconductors|
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|117||Aug, 25(Tue), 20:00~||Zoom webinar||Mark D. Stiles (NIST, USA)||KAIST Global Forum for Spin and Beyond (Second Forum)|